In recent years, thin film transistors (TFTs) including a channel layer of a transparent conductive oxide polycrystalline thin film containing zinc oxide (ZnO) as a main component have actively been developed (Japanese Patent Application Laid-Open No. 2002-076356).
The transparent conductive oxide polycrystalline thin film can be formed at low temperature and is transparent with respect to a visible light, and hence a flexible transparent TFT can be formed on a substrate such as a plastic plate or a film.
However, an oxide semiconductor containing ZnO has high sensitivity with respect to an atmosphere, and hence, in order to put the oxide semiconductor into practical use as a semiconductor device, it is necessary to isolate a semiconductor layer thereof from an atmosphere with the use of a protective layer (Japanese Patent Application Laid-Open No. S63-101740). In addition, there is also a description in that a silicon oxide (SiO2) layer can be formed on an interface with the oxide semiconductor including an isolation layer used as a protective layer of a field effect transistor which uses ZnO as a semiconductor layer (U.S. Patent Application Publication No. 2006/0244107).
Besides, it is disclosed that, in a thin film transistor including an oxide semiconductor film using ZnO or the like, an insulating layer formed of two layers is employed (U.S. Pat. No. 6,563,174). In this case, the insulating layer forming an interface with a semiconductor is assumed to be an oxide insulator, for example, SiO2. Further, other insulators are formed of silicon nitride (SiNz) having high insulating property. With this structure, improvement of crystallinity of the oxide semiconductor film and reduction of interface defect level can be expected.
Moreover, it is known that, in an oxide semiconductor device using ZnO as a main component, when silicon nitride (SiNx) formed by plasma enhanced chemical vapor deposition (also referred to as PECVD) is used as a gate insulating layer, the following problem occurs. In other words, because hydrogen concentration is high in the insulating layer, reductive desorption of a ZnO component occurs, and hence resistance of a ZnO surface layer is lowered. Then, as avoidance measures therefor, it is disclosed that the hydrogen concentration of an interface side with the oxide semiconductor is reduced (Japanese Patent Application Laid-Open No. 2007-073562).
The inventors of the present invention have examined the oxide semiconductor devices including an In—Ga—Zn—O amorphous oxide semiconductor device, and it has been confirmed that the resistance of the oxide semiconductor under reducing atmosphere changes greatly (changes into low resistance). In order to reduce its influence, it is also known to be effective that the oxide semiconductor is previously manufactured to have high resistance to allow for an amount of resistance change and is subsequently subjected to annealing at a temperature equal to or higher than 300° C. (C. J. Kim et. al, IEEE International Electron Devices Meeting Proceedings, 2006). However, it is difficult to apply this method to a plastic substrate or the like with low heat resistance, because the substrate itself does not have sufficient heat resistance to a manufacturing temperature or an anneal temperature for the oxide semiconductor. Further, generally, the above-mentioned substrate with low heat resistance for a low temperature process has high gas-transmission property or high gas-release property, and hence it is indispensable to form a barrier coating layer for suppressing an influence on the semiconductor device. Therefore, in the substrate for a low temperature process, which is represented by the plastic substrate, a barrier layer such as a barrier coating layer or a protective layer is required to be formed in a region of a low temperature equal to or lower than 250° C. As a formation method for the barrier layer, there is generally used PECVD which provides a higher film formation rate and excellent productivity. However, an insulating layer functioning as the barrier layer such as the barrier coating layer or the protective layer, which is formed by PECVD, contains a large amount of in-film hydrogen (amount of hydrogen contained in the insulating layer), and hence the oxide semiconductor cannot be formed without making the oxide semiconductor have lower resistance. (Hereinafter, the barrier coating layer and the protective layer are collectively referred to as barrier layer in this description.)
Japanese Patent Application Laid-Open No. 2007-073562 discloses that SiNx formed by PECVD at a temperature of 250° C. has less hydrogen content and is effective as an insulating layer which comes into contact with the oxide semiconductor. However, when the inventors of the present invention used the SiNx formed by PECVD at a temperature of 250° C. as the insulating layer which comes into contact with the oxide semiconductor, it was found that lowering of the resistance of the oxide semiconductor was not sufficiently suppressed in the case of not performing annealing at a temperature higher than 250° C. U.S. Pat. No. 6,563,174 describes that insertion of an oxide insulating layer is effective in improving crystallinity of the oxide semiconductor and in reducing the interface level density, but it was found that hydrogen diffusion from SiNz could not be stopped in the film formation performed at a temperature equal to or lower than 250° C., which was not sufficient to suppress lowering of the resistance of the oxide semiconductor. In U.S. Pat. No. 6,563,174, the improvement of crystallinity of crystal ZnO is put into focus, and hence there is no description of the low temperature process with the highest temperature set to 250° C. or lower, nor disclosure in that the amount of in-film hydrogen greatly relates to conditions for suppressing the lowering of the resistance of the oxide semiconductor.
As described above, the structure of a practicable oxide semiconductor device, in which the oxide semiconductor device is stably manufactured by the low temperature process at the temperature equal to or lower than 250° C., has not been clear. Therefore, a display apparatus using the oxide semiconductor device manufactured by the low temperature process has not achieved its practical use.